1. Field of the Invention
The present invention relates to a display panel and an active device array substrate thereof, and more particularly to a display panel and an active device array substrate having a slim border.
2. Description of Related Art
Generally, a display panel is composed of an active device array substrate, an opposite substrate and a display medium. The manufacture of the peripheral circuit on the non-display region (peripheral region) of the active device array, which can be integrated in the chip-on-glass process or the chip-on-thin-film process, and the manufacture of the active device array can be implemented at the same time.
FIG. 1 is a schematic top view of a conventional active device array substrate. FIG. 2 is a partially enlarged schematic diagram of the active device array substrate depicted in FIG. 1. As shown in FIG. 1 and FIG. 2, the active device array substrate 101 includes a substrate 110, a plurality of scan lines 122, a plurality of data lines 132, a plurality of pixel units 140 and a driving chip 150. The substrate 110 has a display region 112 and a non-display region 114, wherein the non-display region 114 surrounding the display region 112 with borders 114a and 114b. The scan lines 122 and the data lines 132 cross over each other so as to form several pixel units 140 within the display region 112. The driving chip 150 is located in the non-display region 114 of the substrate 110, and the scan lines 122 and the data lines 132 are electrically connected to the driving chip 150. Moreover, the data lines 132 are electrically connected to the driving chip 150 through the wire routing of the peripheral circuit at the upper and the lower sides of the border 114b. 
For instance, in the display panel with the use of the trichromatic color (RGB) to adjust the level of the colorfulness and with a 640×480 video graphic array resolution, the amount of the scan lines 122 of the aforementioned active device array substrate 101 is 480 (G1, G2, G3 . . . G480) and the amount of the data lines 132 of the aforementioned active device array substrate 101 is 1920 (640×3=1920, S1, S2, S3 . . . S1920). Therefore, it is necessary for one of the borders at the upper and the lower sides of the display region 112 to have enough space for the wire routing of the peripheral circuit with 960 data lines (1920/2=960) therein. That is, the active device array substrate 101 should have enough border width W for the data lines 132 to be electrically connected to the driving chip 150. Herein, the border width W of the active device array substrate 101 is larger than 1.2 centimeter.
Due to high demand on smaller dimensions of the display panel applications such as portable phone and digital camera, how to decrease the border width W of the active device array substrate 101 in order to improve the portability of the electronic product becomes an important issue to be solved immediately.